Impact of dynamic voltage scaling and thermal factors on SRAM reliability

This work investigates the e↵ects of temperature and voltage scaling in neutron-induced bit-flip in SRAM memory cells. Proposed approach allows determining the critical charge according to the dynamic behaviour of the temperature as a function of the voltage scaling. Experimental results show that both temperature and voltage scaling can increase in at least two times the susceptibility of SRAM cells to Soft Error Rate (SER). In addition, a model for electrical simulation for soft error and di↵erent voltages was described to investigate the e↵ects observed in the practical neutron irradiation experiments. Results can guide designers to predict soft error e↵ects during the lifetime of SRAM-based devices considering di↵erent power supply modes.